28#define RTE_PCI_CFG_SPACE_SIZE 256
29#define RTE_PCI_CFG_SPACE_EXP_SIZE 4096
31#define RTE_PCI_VENDOR_ID 0x00
32#define RTE_PCI_DEVICE_ID 0x02
33#define RTE_PCI_COMMAND 0x04
36#define RTE_PCI_COMMAND_MASTER 0x4
39#define RTE_PCI_EXP_DEVCTL 8
42#define RTE_PCI_EXT_CAP_ID(header) (header & 0x0000ffff)
43#define RTE_PCI_EXT_CAP_NEXT(header) ((header >> 20) & 0xffc)
45#define RTE_PCI_EXT_CAP_ID_ERR 0x01
46#define RTE_PCI_EXT_CAP_ID_DSN 0x03
47#define RTE_PCI_EXT_CAP_ID_SRIOV 0x10
50#define RTE_PCI_SRIOV_CAP 0x04
51#define RTE_PCI_SRIOV_CTRL 0x08
52#define RTE_PCI_SRIOV_INITIAL_VF 0x0c
53#define RTE_PCI_SRIOV_TOTAL_VF 0x0e
54#define RTE_PCI_SRIOV_NUM_VF 0x10
55#define RTE_PCI_SRIOV_FUNC_LINK 0x12
56#define RTE_PCI_SRIOV_VF_OFFSET 0x14
57#define RTE_PCI_SRIOV_VF_STRIDE 0x16
58#define RTE_PCI_SRIOV_VF_DID 0x1a
59#define RTE_PCI_SRIOV_SUP_PGSIZE 0x1c
62#define PCI_PRI_FMT "%.4" PRIx32 ":%.2" PRIx8 ":%.2" PRIx8 ".%" PRIx8
63#define PCI_PRI_STR_SIZE sizeof("XXXXXXXX:XX:XX.X")
66#define PCI_SHORT_PRI_FMT "%.2" PRIx8 ":%.2" PRIx8 ".%" PRIx8
72#define PCI_RESOURCE_FMT_NVAL 3
75#define PCI_MAX_RESOURCE 6
100#define RTE_PCI_ANY_ID (0xffff)
102#define PCI_ANY_ID RTE_DEPRECATED(PCI_ANY_ID) RTE_PCI_ANY_ID
103#define RTE_CLASS_ANY_ID (0xffffff)
118 char *output,
size_t size);
void rte_pci_device_name(const struct rte_pci_addr *addr, char *output, size_t size)
int rte_pci_addr_cmp(const struct rte_pci_addr *addr, const struct rte_pci_addr *addr2)
int rte_pci_addr_parse(const char *str, struct rte_pci_addr *addr)
uint16_t subsystem_vendor_id
uint16_t subsystem_device_id